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Renesas Electronics /R7FA6M3AH /GLCDC /TCON_STHB1

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Interpret as TCON_STHB1

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (HW)HW0 (HS)HS

HW=HW, HS=HS

Description

TCON Horizontal Timing Setting Register STHB1

Fields

HW

STHx1 second change timing.Sets the signal assertion width.

0 (HW): HW pixels. The valid range is 0x000 to 0x3FF.
HS

STHx1 first change timing

0 (HS): HS lines. The valid range is 0x000 to 0x3FF.

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data